1. Field of the Invention
The present invention relates to a method for operating a PMC memory cell, particularly for use in a CBRAM memory array. The present invention further relates to a CBRAM memory circuit including a CBRAM memory array having at least one PMC memory cell.
2. Description of the Related Art
One type of non-volatile memory cell is a resistivity changing memory cell which utilizes the resistance value of a memory element to store one or more bits of data. One type of resistivity changing memory cell is a phase change memory, which utilizes a phase change material (having an amorphous state and at least one crystalline state) as the resistive element. Another type of resisitivity changing memory cell, comprising a solid electrolyte material, is known as PMC (programmable metallization cell) memory cell. Memory devices including such PMC memory cells are known as CBRAM (conductive-bridging random access memory) devices. The storing of different states in a PMC memory cell is based on the developing or diminishing of a conductive path in the electrolyte material between electrodes based on an applied electrical field. Although the electrolyte material has a high resistance, the conductive path between electrodes has a low resistance. Thereby, the PMC memory cell can be set to different states depending on the set resistance of the PMC memory element. Usually, both states of the PMC memory element are sufficiently time-stable in such a way that data may permanently be stored.
A PMC memory cell is being operated by applying a positive or a negative voltage to the solid electrolyte of the PMC memory element. To store data into the PMC memory cell, the PMC memory cell is brought to a programmed state by applying a suitable programming voltage to the PMC memory cell which results in the development of the conductive path in the electrolyte material and therefore in the setting of a first state with low resistance. To store a second state in the PMC memory cell, an erase voltage has to be supplied in such a manner that the resistance of the PMC memory cell changes to a high resistance, which refers to an erased state. To read out a PMC memory cell, a read voltage is applied, and the current through resistance of the PMC memory element is detected and associated to the respective state of the PMC memory cell.
The stability of the stored data in the PMC memory cells over periods of time (retention) is different depending on the state set in the PMC memory element. The erased state having a high resistance is usually time-stable, which means that the high resistance of the PMC memory cell substantially does not degrade. In contrast thereto, the programmed state wherein the conductive path is developed has a more limited retention time, i.e., the value of the resistance of the PMC memory cell increases over time. This effect depends on the start resistance and becomes even worse at higher temperatures. Thus, the resistance windows between the resistances of the first and second states must be increased particularly if the retention time is to be high. Due to the degradation of the programmed state, the reliability of the PMC memory cell is reduced.
Another issue while storing data in the PMC memory cell lies in that an “imprinting” of data occurs if the programming voltage is applied for a successive number of times when the programmed state is to be written into a PMC memory element. The writing of the erased state having a high resistance, is a self-limiting process, i.e., a PMC memory element can be erased for any number of times without any drawbacks. In contrast thereto, a PMC memory element should not be programmed to the programmed state more than once in a row as this results in an irreversible imprinting of the programmed state as the conductive path in the electrolyte material is reinforced every time the programming voltage is applied. The programmed state stored thereby is then “imprinted” and cannot be erased by successively applying the erase voltage.
In the prior art, it is proposed to perform an erasure of the PMC memory cell every time prior to new data being written into the PMC memory cell to avoid an imprinting of a programmed state.